Samtec gEEk® spEEk Webinar Series

Samtec’s gEEk® spEEk Webinar Series allows engineers to interact live with Samtec’s engineering leaders and SI experts.
Latest gEEk® spEEk Webinar
November 16, 2023
Array Connectors for Multi-Channel Antennas-to-Bits System Architectures

Upcoming gEEk® spEEk Webinars
2024 gEEk® spEEk Topics:
Topic: DesignCon Preview Register Here
Presenters: Robert Branson, Istvan Novak, Gustavo Blando, Richard Mellitz, Brandon Gore, Steve Krooswyk, Scott McMorrow, and Sandeep Sankararaman
January 18th 2024 | 2:15 PM EST | 11:15 AM PST
*Topic: Survey on Correlation and Simulation Methodologies for PCB Structures through 67GHz
Presenter: TBD
February 2024 | 2:15 PM EST | 11:15 AM PST
*Subject to change
On-Demand gEEk® spEEk Webinars
Power Integrity
March 16, 2023
How to Measure Low PDN Impedance

February 16, 2023
SI/PI AM(A)A – A Conversation with Scott McMorrow

December 16, 2021
Pros & Cons of Thin Laminates in Power Distribution

March 16, 2023
How to Measure Low PDN Impedance

January 19, 2023
High-Speed SI and PI: DesignCon 2023 Preview

November 18, 2021
PDN: Losses May Be Friends, But Inductance is Your Enemy

August 19, 2021
How to Read the ESR Curve of Capacitors

January 21, 2021
S & Z Parameters for PDN
December 3, 2020
Using Ferrites and Inductors in PDNs

July 16, 2020
Multi-Layer Capacitor (MLCC) Losses
June 4, 2020
DC Blocking Capacitor Location
May 14, 2020
The Perils of Right-Angle Turns at DC
Signal Integrity
October 19, 2023
Staying Grounded in the Real World

July 20, 2023
Breakout Design: Cable Connectors

May 18, 2023
SerDes Common Mode Noise – How Much to Too Much?

February 16, 2023
SI/PI AM(A)A – A Conversation with Scott McMorrow

August 18, 2022
Cascaded or End-to-End Interconnect Models

September 21, 2023
Bring S-Parameters into Your Sim Tool
June 15, 2023
Breakout Design: Package and Traces

April 13, 2023
Signal Integrity 101: The Fundamentals of S-Parameters

January 19, 2023
High-Speed SI and PI: DesignCon 2023 Preview

April 28, 2022
Mitigating the Effect of Connector Mating/Normal Forces in SI

February 24, 2022
Single Ended Design Analysis in a Differential World

October 14, 2021
Advanced HD BOR & Crosstalk Mitigation Strategies

September 16, 2021
Development of 112 Gbps PAM4 Test Platforms

July 15, 2021
Common Mode Conundrums
June 17, 2021
Advanced Test Fixture Design

May 20, 2021
Causality Enforcement
February 18, 2021
Bending EM Simulation Tools

November 19, 2020
Practical Uses of ERL in BOR Design

November 5, 2020
What is ERL? How is it Computed?

September 24, 2020
Periodic Discontinuities
September 10, 2020
Noise and Simulation Correlation
August 27, 2020
High-Speed Connector SI Round-Up
August 13, 2020
Trace Corner Bends: OK or Not?

July 30, 2020
Signal Power and Noise and SI
July 2, 2020
IEEE Channel Operating Margin (COM)
June 25, 2020
Trace Design for Crosstalk Reduction

June 18, 2020
Breakout Region Design by Inspection
June 11, 2020
Impedance Corrected De-Embedding
May 28, 2020
Component XTLK Characterization by ICN
May 21, 2020
Quantifying Glass Induced Skew on PCBs
May 7, 2020
Twinax Basics
April 30, 2020
PCI Express: Is 85 Ohms Really Needed?
RF
August 17, 2023
Mechanical Consideration for Compression Mount RF Connectors

December 15, 2022
Impacts of Solder Reflow on High Bandwidth RF Connectors

August 17, 2023
Mechanical Consideration for Compression Mount RF Connectors

October 20, 2022
Precision RF Connector PCB Launches for 224 Gbps Devices

October 22, 2020
XTLK Mitigation in 12G-SDI Systems

October 8, 2020
Waveguides and Cut-off Frequencies

EMI
Crosstalk
October 14, 2021
Advanced HD BOR & Crosstalk Mitigation Strategies

July 15, 2021
Common Mode Conundrums
October 22, 2020
XTLK Mitigation in 12G-SDI Systems

May 28, 2020
Component XTLK Characterization by ICN
PCI Express
April 15, 2021
Successful PCIe® 4.0 Interconnect Guidelines

May 28, 2020
Component Crosstalk Characterization by ICN
April 30, 2020
PCI Express: Is 85 Ohms Really Needed?
IEEE-COM
July 15, 2021
Common Mode Conundrums
March 18, 2021
Mechanics of Using the Public COM Code

November 5, 2020
What is ERL? How is it Computed?

September 10, 2020
Noise and Simulation Correlation
July 30, 2020
Signal Power and Noise and SI
July 2, 2020
IEEE Channel Operating Margin (COM)
Interconnect
July 20, 2023
Breakout Design: Cable Connectors

August 18, 2022
Cascaded or End-to-End Interconnect Models: What Do We Give Up?

June 15, 2023
Breakout Design: Package and Traces

February 24, 2022
Single Ended Design Analysis in a Differential World

October 14, 2021
Advanced HD BOR & Crosstalk Mitigation Strategies

September 16, 2021
Development of 112 Gbps PAM4 Test Platforms

July 15, 2021
Common Mode Conundrums
June 17, 2021
Advanced Test Fixture Design

February 18, 2021
Bending EM Simulation Tools

November 19, 2020
Practical Uses of ERL in BOR Design

November 5, 2020
What is ERL? How is it Computed?

September 24, 2020
Periodic Discontinuities
August 13, 2020
Trace Corner Bends: OK or Not?

June 25, 2020
Trace Design for Crosstalk Reduction

June 18, 2020
Breakout Region Design by Inspection
Mechanical / Manufacturing
September 16, 2021
Development of 112 Gbps PAM4 Test Platforms

May 21, 2020
Quantifying Glass Induced Skew on PCBs
Test Platforms
June 17, 2021
Advanced Test Fixture Design

November 5, 2020
What is ERL? How is it Computed?

Measurement
September 16, 2021
Development of 112 Gbps PAM4 Test Platforms

June 17, 2021
Advanced Test Fixture Design

May 20, 2021
Causality Enforcement
January 21, 2021
S & Z Parameters for PDN
November 5, 2020
What is ERL? How is it Computed?

June 11, 2020
Impedance Corrected De-Embedding
May 21, 2020
Quantifying Glass Induced Skew on PCBs
May 7, 2020
Twinax Basics
Modeling
September 21, 2023
How to Bring S-Parameters into Your Simulation Tool

February 18, 2021
Bending EM Simulation Tools

November 5, 2020
What is ERL? How is it Computed?

October 8, 2020
Waveguides and Cut-off Frequencies

September 24, 2020
Periodic Discontinuities
August 13, 2020
Trace Corner Bends: OK or Not?

June 25, 2020
Trace Design for Crosstalk Reduction

June 18, 2020
Breakout Region Design by Inspection
June 11, 2020
Impedance Corrected De-Embedding
May 21, 2020
Quantifying Glass Induced Skew on PCBs
May 7, 2020
Twinax Basics
For More Information
Please contact us at gEEkspEEk@samtec.com with any additional questions. Stay tuned to the Samtec blog for more details on future gEEk® spEEk events.