DesignCon attendees typically look forward every year to catching up with Samtec gEEks®, our technical experts and engineering leaders. With gEEk® spEEk, we are trying to re-create that same environment in a virtual setting.
Although many engineers and SI experts are WFH, they still need to keep their skills sharp. Samtec’s new gEEk® spEEk Zoom Webinar Series allows engineers to interact with Samtec’s engineering leaders and SI experts.
- Latest gEEk® spEEk Webinar
- Upcoming gEEk® spEEk Webinars
- On-Demand gEEk® spEEk Webinars
- For More Information
Latest gEEk® spEEk Webinar
June 23, 2022
Dual Reverberation Cavities for IO Connector EMI Performance
Upcoming gEEk® spEEk Webinars
Cascaded or End-to-End Interconnect Models: What Do We Give Up?
Presenter: Robert Branson
August 18, 2022 | 2:15 PM EST | 11:15 AM PST
Practical Impacts of Solder Reflow on High Bandwidth Precision RF Connectors
Presenter: Michael Griesi
Dec. 15, 2022 | 2:15 PM EST | 11:15 AM PST
Precision RF Connector PCB Launches for 224 Gbps Devices
Presenter: Sandeep Sankararaman
October 20, 2022 | 2:15 PM EST | 11:15 AM PST
TOPIC: TBD
Presenter: TBD
February 16, 2023 | 2:15 PM EST | 11:15 AM PST
On-Demand gEEk® spEEk Webinars
April 28, 2022
Mitigating the Effect of Connector Mating and Normal Forces in Signal Integrity
February 24, 2022
Single Ended Design Analysis in a Differential World
November 18, 2021
PDN: Losses May Be Friends, But Inductance is Your Enemy
September 16, 2021
Development of 112 Gbps PAM4 Test Platforms
July 15, 2021
Common Mode Conundrums
May 20, 2021
Causality Enforcement
March 18, 2021
Mechanics of Using the Public COM Code
January 21, 2021
S & Z Parameters for PDN
April 28, 2022
Mitigating the Effect of Connector Mating and Normal Forces in Signal Integrity
December 16, 2021
Pros & Cons of Thin Laminates in Power Distribution
October 14, 2021
Advanced HD BOR & Crosstalk Mitigation Strategies
August 19, 2021
How to Read the ESR Curve of Capacitors
June 17, 2021
Advanced Test Fixture Design
April 15, 2021
Successful PCIe® 4.0 Interconnect Guidelines
February 18, 2021
Bending EM Simulation Tools
December 3, 2020
Using Ferrites and Inductors in PDNs
November 19, 2020
Practical Uses of ERL in BOR Design
November 5, 2020
What is ERL? How is it Computed?
October 22, 2020
XTLK Mitigation in 12G-SDI Systems
October 8, 2020
Waveguides and Cut-off Frequencies
September 24, 2020
Periodic Discontinuities
September 10, 2020
Noise and Simulation Correlation
August 27, 2020
High-Speed Connector SI Round-Up
August 13, 2020
Trace Corner Bends: OK or Not?
July 30, 2020
Signal Power and Noise and SI
July 16, 2020
Multi-Layer Capacitor (MLCC) Losses
July 2, 2020
IEEE Channel Operating Margin (COM)
June 25, 2020
Trace Design for Crosstalk Reduction
June 18, 2020
Breakout Region Design by Inspection
June 11, 2020
Impedance Corrected De-Embedding
June 4, 2020
DC Blocking Capacitor Location
May 28, 2020
Component XTLK Characterization by ICN
May 21, 2020
Quantifying Glass Induced Skew on PCBs
May 14, 2020
The Perils of Right-Angle Turns at DC
May 7, 2020
Twinax Basics
April 30, 2020
PCI Express: Is 85 Ohms Really Needed?
For More Information
Please contact us at gEEkspEEk@samtec.com with any additional questions. Stay tuned to the Samtec blog for more details on future gEEk® spEEk events.
Samtec looks forward to engaging with our many engineering customers via this new, exciting webinar series.